1. Technical Field
The present disclosure relates to chip packaging technology, and particularly to a packaging substrate, a method for manufacturing the packaging substrate, and a chip packaging body having the packaging substrate.
2. Description of Related Art
Chip packaging structure may include a packaging substrate and a chip. The PCB is configured to form a connecting pad. A typical packaging substrate includes a dielectric layer, two wiring layers arranged on opposite sides of the dielectric layer and a plurality of conductive vias formed in the dielectric layer, the vias being electrically connected to the two wiring layers. However, the conductive vias are formed through an electroplating method, which is complex and consumes too much time.
What is needed therefore is a packaging substrate, a method for manufacturing the packaging substrate, and a chip packaging body having the packaging substrate, to overcome the described limitations.